THE NON-SCAN DELAY TEST ENRICHMENT BASED ON RANDOM GENERATED LONG TEST SEQUENCES

Abstract

The paper investigates the possibilities of application of random generated test sequences for at-speed testing of non-scan synchronous sequential circuits. Our research shows that relatively long random test sequences exhibit better transition fault coverages than tests produced by deterministic ATPG tools. We proposed an approach for dividing of long test sequences into subsequences. The application of the presented approach allows increasing the fault coverage of the initial random generated test sequence, minimizing the length of the test by eliminating subsequences that don’t detect new faults and determining, for particular circuit, the required length of the test subsequence which can be used for further construction of the test. The provided experimental results demonstrate the effectiveness of the proposed approach.