GENERATION OF FUNCTIONAL DELAY TEST WITH MULTIPLE INPUT TRANSITIONS

Abstract

The test can be developed at the functional level of the circuit. Such an approach allows developing the test at the early stages of the design process in parallel with other activities of this process. The main problem is the achievement of the high quality of the functional test that would be applicable at the gate level implementation of the circuit. The paper presents an algorithm of the functional delay test generation and results of its application to the benchmark circuits. The algorithm is based on the criteria of the quality assessment of the functional test consisting of the pairs of patterns with multiple signal transitions. The criteria are based solely on the primary input values and the primary output values of the software prototype. The criteria allow evaluating the robust and the non-robust test patterns. The presented experimental results demonstrate that the non-robust test patterns enable to increase the transition fault coverage. The use in the pair of test patterns with multiple input transitions enables to decrease the size of test set without loss of transition fault coverage.