Analogue Integrated Circuits Design-for-Testability Flow Oriented onto OBIST Strategy

Authors

  • Sergey G. Mosin Kazan Federal University

DOI:

https://doi.org/10.5755/j01.itc.47.3.19753

Keywords:

Oscillation-BIST, Analogue circuits, Design automation, Design-for-testability flow, Reconfiguration circuitry

Abstract

Oscillation Built-In Self-Test (OBIST) strategy allows to avoid the using complex, expensive generators of input test signals during testing, and uses the oscillation frequency generated at the output of the circuit after reconfiguring into oscillator as a controlled parameter. There configuration subcircuit forms an oscillator from the original circuit in the test mode and requires an additional but insignificant area of the chip, especially against the background of stable increasing the scale of integration for the state-of-the-art integrated technologies. Selection of the efficient type of reconfiguration the original circuit into oscillator and implementation of corresponding test circuitry are the most important tasks, which as rule are solved nowadays based on experience of designers without automation and therefore restrict to wide use of the OBIST concept. The paper is mainly focused on the task of design-for-testability (DFT) automation with emphasis on OBIST strategy for analog integrated circuits (IC). The design procedures according to DFT flow are proposed. Three possible structural solutions for reconfiguration of original circuit into an oscillator are considered. The necessary conditions for stability analysis of reconfigured circuit are presented. The stage of a numerical estimating the transient time before the steady-state operation after reconfiguration of original circuit into an oscillator ensuring definition of the start time point for correct calculating the oscillation frequency is proposed. The set of rules for each structural solution for reconfiguration is prepared as the formal procedures, which can support the automation during the DFT flow. The efficiency of the proposed DFT flow is demonstrated for analog circuits, for which the reconfiguration subcircuits were obtained in automated way during design-for-testability, as well as the fault simulation has been performed. The experimental results for all cases showed the adequacy of oscillation frequency for revealing both catastrophic and parametric faults. Fault coverage for considered set of faults has consisted up to 100 %.

DOI: http://dx.doi.org/10.5755/j01.itc.47.3.19753

Author Biography

Sergey G. Mosin, Kazan Federal University

Ph.D., Director of the Institute of Computational Mathematics and Information Technologies

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Published

2018-09-10

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Section

Articles